#ifndef MAC_REG_RX_BRFEC_H
#define MAC_REG_RX_BRFEC_H

/* Base address of Module's Register */
#define CSR_RX_BRFEC_BASE (0x10000)

#define CSR_RX_BRFEC_INT_STATUS (CSR_RX_BRFEC_BASE + 0x0)
#define CSR_RX_BRFEC_INT_ENABLE (CSR_RX_BRFEC_BASE + 0x4)
#define CSR_RX_BRFEC_INT_SET (CSR_RX_BRFEC_BASE + 0x8)
#define CSR_RX_BRFEC_OVF_INT_STATUS (CSR_RX_BRFEC_BASE + 0xc)
#define CSR_RX_BRFEC_OVF_INT_ENABLE (CSR_RX_BRFEC_BASE + 0x10)
#define CSR_RX_BRFEC_OVF_INT_SET (CSR_RX_BRFEC_BASE + 0x14)
#define CSR_RX_BRFEC_PHY_CERR_INT_STATUS (CSR_RX_BRFEC_BASE + 0x18)
#define CSR_RX_BRFEC_PHY_CERR_INT_ENABLE (CSR_RX_BRFEC_BASE + 0x1c)
#define CSR_RX_BRFEC_PHY_CERR_INT_SET (CSR_RX_BRFEC_BASE + 0x20)
#define CSR_RX_BRFEC_PHY_UERR_INT_STATUS (CSR_RX_BRFEC_BASE + 0x24)
#define CSR_RX_BRFEC_PHY_UERR_INT_ENABLE (CSR_RX_BRFEC_BASE + 0x28)
#define CSR_RX_BRFEC_PHY_UERR_INT_SET (CSR_RX_BRFEC_BASE + 0x2c)
#define CSR_RX_BRFEC_PHY_RSTN (CSR_RX_BRFEC_BASE + 0x40)
#define CSR_RX_BRFEC_DBG_IERR_INSERT (CSR_RX_BRFEC_BASE + 0x60)
#define CSR_RX_BRFEC_IERR_U_INFO (CSR_RX_BRFEC_BASE + 0x64)
#define CSR_RX_BRFEC_IERR_C_INFO (CSR_RX_BRFEC_BASE + 0x68)
#define CSR_RX_BRFEC_IERR_U_CNT (CSR_RX_BRFEC_BASE + 0x6c)
#define CSR_RX_BRFEC_IERR_C_CNT (CSR_RX_BRFEC_BASE + 0x70)
#define CSR_RX_BRFEC_SPARE (CSR_RX_BRFEC_BASE + 0x80)
#define CSR_RX_BRFEC_SPARE_CNT (CSR_RX_BRFEC_BASE + 0x84)
#define CSR_RX_BRFEC_PHY0_CONTROL (CSR_RX_BRFEC_BASE + 0x100)
#define CSR_RX_BRFEC_PHY0_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x140)
#define CSR_RX_BRFEC_PHY0_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x150)
#define CSR_RX_BRFEC_PHY0_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x160)
#define CSR_RX_BRFEC_PHY0_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x170)
#define CSR_RX_BRFEC_PHY1_CONTROL (CSR_RX_BRFEC_BASE + 0x180)
#define CSR_RX_BRFEC_PHY1_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x190)
#define CSR_RX_BRFEC_PHY1_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x194)
#define CSR_RX_BRFEC_PHY1_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x198)
#define CSR_RX_BRFEC_PHY1_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x19c)
#define CSR_RX_BRFEC_PHY2_CONTROL (CSR_RX_BRFEC_BASE + 0x200)
#define CSR_RX_BRFEC_PHY2_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x240)
#define CSR_RX_BRFEC_PHY2_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x250)
#define CSR_RX_BRFEC_PHY2_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x260)
#define CSR_RX_BRFEC_PHY2_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x270)
#define CSR_RX_BRFEC_PHY3_CONTROL (CSR_RX_BRFEC_BASE + 0x280)
#define CSR_RX_BRFEC_PHY3_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x290)
#define CSR_RX_BRFEC_PHY3_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x294)
#define CSR_RX_BRFEC_PHY3_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x298)
#define CSR_RX_BRFEC_PHY3_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x29c)
#define CSR_RX_BRFEC_PHY4_CONTROL (CSR_RX_BRFEC_BASE + 0x300)
#define CSR_RX_BRFEC_PHY4_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x340)
#define CSR_RX_BRFEC_PHY4_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x350)
#define CSR_RX_BRFEC_PHY4_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x360)
#define CSR_RX_BRFEC_PHY4_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x370)
#define CSR_RX_BRFEC_PHY5_CONTROL (CSR_RX_BRFEC_BASE + 0x380)
#define CSR_RX_BRFEC_PHY5_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x390)
#define CSR_RX_BRFEC_PHY5_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x394)
#define CSR_RX_BRFEC_PHY5_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x398)
#define CSR_RX_BRFEC_PHY5_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x39c)
#define CSR_RX_BRFEC_PHY6_CONTROL (CSR_RX_BRFEC_BASE + 0x400)
#define CSR_RX_BRFEC_PHY6_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x440)
#define CSR_RX_BRFEC_PHY6_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x450)
#define CSR_RX_BRFEC_PHY6_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x460)
#define CSR_RX_BRFEC_PHY6_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x470)
#define CSR_RX_BRFEC_PHY7_CONTROL (CSR_RX_BRFEC_BASE + 0x480)
#define CSR_RX_BRFEC_PHY7_DIAG_FEC_VL_STATE_ (CSR_RX_BRFEC_BASE + 0x490)
#define CSR_RX_BRFEC_PHY7_DIAG_FEC_VL_HIS_STATE_ (CSR_RX_BRFEC_BASE + 0x494)
#define CSR_RX_BRFEC_PHY7_DIAG_CORR_BLK_ (CSR_RX_BRFEC_BASE + 0x498)
#define CSR_RX_BRFEC_PHY7_DIAG_UCORR_BLK_ (CSR_RX_BRFEC_BASE + 0x49c)

#endif